New nanoscale process will help in faster computing

27 September 2008

Scientists and researchers at University of California, Santa Barbara have developed new technology that will help in many features of advance computing. Block copolymer lithography, a new integrated chip manufacturing technique from bottom up was used to create a square nanoscale chemical pattern. The outcome of the project is expected by the 2011, when a new integrated circuit chip will be available in the market.

The project was funded by leading integrated chip manufacturers including IBM and Intel and others including NSF (National Science Foundation). Researchers led by Craig Hawker of University of California, Santa Barbara have developed silicon wafer that are 5 to 20 nanometer thick.

Conventionally the microprocessors are made by photolithography, a top down technique and using light on silicon wafer so that chemical patterns are made. As wavelength of the light is limited, researchers at UCSB have developed a novel process for creating smaller patterns by using bottom up technique. The block copolymer lithography is based on natural self-assembly process and using lithography tool, chemical pattern on silicon wafer are created.

The major advantage of the new technique is that the big microprocessor manufacturing companies can utilize their existing plants for manufacturing these new thin microprocessors and will not require any additional investment for upgrading the manufacturing facilities.

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